Hawk, An Example Computer Architecture
the Computer Architecture Pages
Note that all of the assembly language source code used here is formatted for use with the 32-bit version of the machine independent SMAL assembler (version B); the specific opcodes of the Hawk architecture are defined in a special file, hawk.h, that must be included at the head of each Hawk assembly language program. A Hawk emulator written in C is available for use under various versions of UNIX including Linux. A hello world program is available; this uses the emulator and includes a small but useful standard library.
The Hawk computer is a fictional machine that incorporates many features of modern RISC processors without slavish adherance to any particular real machine. The Hawk instruction set is based on a 32 bit word, typical for modern machines, and includes 15 general registers, a modest number by modern standards.
The Hawk architecture began as a midterm exam question in my spring 1996 offering of 22C:122, Advanced Computer Architecture at the University of Iowa. The unnamed architecture presented there was the subject of followup questions and discussions that led to the architecture presented here. I first reduced this architecture to workable form for the fall 1996 offering of 22C:18, Computer Organization and Assembly Language Programming; I owe quite a bit to the students in that class for their patience in working the last few bugs out of the emulator.
Original release: Mar. 6, 1996
Revised: Feb. 27, 2002 — BCDGET instruction replaced by EX3ADJ
Revised: Mar. 13, 2002 — SSQADJ, BTRUNC instructions added
Revised: July 25, 2002 — recode 0000, FFFF as no-ops, add ADJUST, MOVESL
Revised: Aug 1, 2008 — recode to reverse byte order in IR
Revised: June 25, 2014 — add PLUS, floating point coprocessor and Sparrowhawk
Last Modified:Wednesday, 28-Jul-2021 09:08:59 CDT.