5. Hawk Short Immediate Instructions
Part of
the Hawk Manual
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5.1. Short Immediate Format
5.2. Load Immediate
07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | |
1 1 0 - | dst | const |
The 2 instructions in the short immediate format are 16 bits long, incorporating an 8 bit constant.
07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | ||||||
1 1 0 1 | dst (nz) | const | LIS | dst,const | r[dst] = sx(const) | ||||||||||||||||
1 1 0 0 | dst (nz) | const | ORIS | dst,const | r[dst]=r[dst]«8∨const |
LIS ORIS | NZVC unchanged | ||
The LIS (load immediate short) instruction loads the destination register with the sign extended 8 bit constant. Thus, it can be used to load any value between -128 and +127. The ORIS instruction shifts the destination register 8 places left and then puts the 8 bit unsigned constant into the least significant 8 bits of the register. Neither instruction sets the condition codes. Register zero should never be used as a destination with these instructions. Some Hawk CPUs may detect this case and treat it as an illegal instruction or give it an alternative meaning.
Hawk assemblers should provide the mnemonic CLR to clear a register, so that CLR R5 is equivalent to LIS R5,0
07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | ||||||
1 1 0 1 | dst (nz) | 0 0 0 0 0 0 0 0 | CLR | dst | r[dst] = 0 |
An arbitrary 32-bit value can be loaded into a register using an LIL instruction to load the most significant 24 bits of the constant followed by an ORIS instruction to load the bottom 8 bits. Hawk assemblers should provide a macro, LIW (load immediate word) so that, for example, LIW R3,X generates the following two instructions:
LIL R3, X >> 8 ORIS R3, X & #FF