Posing This question to a class typically generates the following kinds of responses:
All of these are true, to some extent, but it is useful to step back for a moment and discuss a broader question:
Architecture is the art and study of the relationship between buildings and their uses. Architects are concerned with such details as the layout of rooms, locations of doors and windows, and the relationship of a building to its surroundings. As such, architects are generally very interested in the intended uses of the buildings they design, and of course, they must understand the technology to be used in making those buildings, but technology is secondary.
For example, consider the 4 buildings surrounding the old state capitol building on the University of Iowa campus. These 4 buildings are architecturally compatable in the sense that they were designed to complement the old capitol building, and therefore, they complement each other.
While these buildings are architecturally compatable, they are based on a wide variety of different construction technologies. The older buildings, Shaeffer Hall and Macbride Hall, are of classical masonry and timber construction. MacLean Hall, while 90 years old, is of modern reinforced concrete construction, and Jessup Hall was built after World War II using steel beam construction. The `compatable architecture' of these buildings is a matter of proportions, window layout, and a thin veneer of limestone; it is not a matter of underlying technology.
When we use the term computer architecture, we use it in the same way! The architecture of a computer does not depend on whether it uses vacuum tubes, discrete transistors, integrated circuits or VLSI. In fact, many architecturally compatable computer families have been built spanning an immense range of implementation technologies.
Of course, just as certain implementation technologies allow new structural options in the building trade, the same is true with computers. The introduction of steel beams in late 19th century buildings allowed the development of the skyscraper. Such structures could not have been made using classical stone and timber construction! In the same way, VLSI implementation allowed the massive complexity of the Pentium family and the beautiful pipeline designs found in modern RISC architectures. Such designs could not have been implemented using vacuum tubes, and only a few daring experiments with discrete transistors hinted at the kind of machine that dominates the marketplace today.
In Bell and Newell's seminal book, Computer Structures -- Readings and Examples, three distinct levels of abstraction were identified:
A diagram of a commonplace modern computer system at the PMS level might look like the following:
_____ PRIMARY BUS _____
| | ____________ | |
| CPU |<____ _____>| MEM |
|_____| | | |_____|
| |
__V__ ISA or PCI BUS
| Bus | _________________
|Link |<___ _____ ___>
|_____| | | | |
__V__ __V__ SCSI BUS
| ISA | |SCSI | ____________
|disk | |Cntrl|<__ _______>
|_____| |_____| | |
__V__
|SCSI |
|disk |
|_____|
Formal ISP descriptions are generally given in a programming language, and if compiled and executed, they serve as interpreters for the instruction set being described. The following example gives a partial ISP description of a very simple computer in C augmented with some comments:
type word unsigned short int; /* assumed to be 16 bit */
word memory[65536];
word pc; /* the program counter */
word temp; /* a temporary */
word ac; /* the accumulator */
word mar; /* the memory address register */
word fetch( word addr );
void store( word addr, word value );
void cpu() {
for (;;) { /* the execution cycle never terminates */
mar = fetch(pc);
pc = pc + 1;
temp = fetch(mar);
mar = fetch(pc);
pc = pc + 1;
store(mar, temp);
}
}
System descriptions at the RT level are frequently done in terms of block diagrams showing data flow between registers, combined with finite state automata descriptions of the control unit that evokes the required data transfers in the appropriate order. The following diagram illustrates this:
_________________________
| ___________ ________<
| | | | Data from memory
CPC __V__ CMAR __V__
---|> PC | ---|>MAR |
|_____| |_____|
| |____ ____| |
|____ | | ____|
| | | |
ADSEL ___V___V___
-----\ 0 MUX 1 /
\_______/ Address to Memory
| |____________
|______________>
It is important to note that any computer system can be viewed at all of these levels, and furthermore, it is important to note that any computer system can be completely specified at either the ISP or RT levels. The PMS level abstracts away major details, so a PMS specification cannot completely specify a computer system.
It is also important to note that the Register Transfer level rests on top of the logic level, the level where we are concerned with gates and flipflops. There are compilers that will produce Register Transfer level designs from sufficiently detailed Instruction Set Processor specifications, and there are compilers that will produce Logic level specificaitons from Register Transfer level specifications.
Logic level specifications can be given equationally or equivalently by logic diagram. Thus, the following two descriptions of an RS flipflop are equivalent:
_ _
Q = not( R and Q )
_ _
Q = not( S and Q )
_ ______
R --------| |
| nand |-o----- Q
-|______| |
| |
----------|-
| |
---------- |
| ______ |
-| | | _
_ | nand |---o--- Q
S --------|______|
We will refer to the logic level quite frequently in this course, but this is
not our primary concern! We will almost never refer to the underlying
technology used to implement the logic level, except for purposes of example,
or for purposes of exploring the economic impact of changes in technology.
Thus, for most purposes, an understanding of relay logic (relays were invented
by Samuel Morse over 150 years ago) or any other logic family will provide
a sufficient foundation for this course.