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The University of Iowa's DEC PDP-8

Restoration Log

Part of the UI-8 pages
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science

Contents


Introduction

This is a chronological log of the progress restoring the University of Iowa's PDP-8 computer. Entries are added at the end as work progresses. Click on any thumbnail image to see full-sized image.


  • Jul 1, 2025, Reverse Engineer Tally reader controller

      thumbnail photo     thumbnail photo  
    Backplane rows B and D
      thumbnail wiring diagram  
    Backplane wiring, as found
    Bug 34: Continuing the work from Jun 24, 2024, we completed (over several days) the job of tracing all the wires in the type 750 High Speed Reader interface. We used a modified version of the backplane reverse-engineering form described on May 12, 2024 to record the wiring. This controller is packaged as part of a perhipheral interface bundle. A cursory inspection shows that the Module Utilization List D-34D-0-3 Rev J is related to our machine but the Psychology department made major changes.

    Several details are omitted here, notably, there were 7 wires from the data inputs to the R203 flipflops in backplane slots B29 through B31 to an unpopulated backplane slot, D29. These were all wires added by the Psychology department, and on careful tracing their function, they all carried raw data from the tape reader. Our best hypothesis is that these wires part of an unfinished project.

      thumbnail schematic diagram  
    Type 750 controller, as found
    The schematic diagram on the left was derived from the above wiring diagram with significant help from DEC's drawing BS D-750C-0-2 revision J, from 1968. That drawing describes an interface for a different paper-tape reader, but the wiring we have closely follows the basic organization of the top half of that drawing.

    The thing that was most apparent in reverse engineering this interface is that it contains a number of features typical of shotgun debugging. The control system is close to twice as complex as required for the Tally reader, and some of the changes make this interface unnecessarily incompatible with the documentation for the interface in the PDP-8 Users Handbook (Digital Equipment Corporation, 1966).

      thumbnail photo     thumbnail photo  
    Rows B and D cleaned up
    While working on this reverse engineering task, we found that backplane slot D29 was not the only one that was wired for an unfinished or abandoned project. It appears that the Psychology department used a number of slots in row D of this backplane segment for projects that were either unfinished or abandoned. We removed the wires from a number of slots in this row that were wired but had nothing plugged into them.

    DEC's backplane wire-wrap pins in the pre-TTL era were designed for 22 or 24 AWG wire using Kynar (polyvinylidene fluoride) insulation. Some of the wire we removed had plain vinyl insulation, which is too soft for use among the sharp corners of wire-wrap pins, and some was 28 or 30 AWG (we did not measure it, but it was definitely too fine.) The blue wires visible in the photo of row D above are examples of this problem that remain in place, for now.