The Digital Equipment Corporation PDP-8Registers and Memory Addressing
Part of
the PDP-8 Programmer's Reference Manual
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0 1 2|00 01 02 03 04 05 06 07 08 09 10 11 ________|___________________________________ | | | | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__|__|__|__| 3 bits | 5 bits | 7 bits field | page | word in page
The main memory may vary from 4K to 32K 12-bit words. Memory addresses are 12 bits, with a 3 bit extension to specify the field that is present only on machines configured to operate with over 4K words.
The 12 bit address, specifying one word in the current field, is logically broken into two subfields, 5 bits to specify the page in field, and 7 bits to specify the word in page.
0 1 2|00 01 02 03 04 05 06 07 08 09 10 11 ________|___________________________________ | | | | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__|__|__|__| 3 bits | 5 bits | 7 bits | current page | word in page IF | | program counter
The program counter (including the optional instruction field) specifies the memory address from which the next instruction will be fetched. After an instruction fetch, the program counter is incremented. Carrys generated by incrementing or the PC do not propagate into the IF bits, if they are present.
0 1 2|00 01 02 03 04 05 06 07 08 09 10 11 ________|___________________________________ | | | | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__|__|__|__| 3 bits | 12 bits DF | indirect wordThe 3 bit data field register, if present, specifies the high bits of the address used for indirect operand fetches and stores.
|00 01 02 03 04 05 06 07 08 09 10 11 __|___________________________________ | | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__|__| | LINK | 12 bit AC |
Logically, the link bit and accumulator constitute a single 13 bit register because the link bit toggles whenever a carry is generated from the accumulator. All arithmetic and logical operations operate on this register.
00 01 02 03 04 05 06 07 08 09 10 11 ___________________________________ | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__| 12 bit MQ
Prior to the PDP-8/E, this 12 bit register was always optional, being available only if the extended arithmetic element was present. On the 8/E and later models, this register is always present. Software intended for portability across all PDP-8 models should not use this register.