Notes

In the early 1960's, IBM was selling the IBM 7040 and 7090 to what they referred to as the scientific computing market, which were transistorized descendants of the 36-bit IBM 701, and they were selling the IBM 1401, a variable-word-length decimal machine that was wildly successful as computer for medium and large-sized businesses, and was also frequently used as a peripheral controller for IBM 70xx-series machines. These two families of machines had very little in common except that both use 6-bit extended BCD character sets, read and written from punched cards or 7-track tape.

Typically the 70xx-series machines were programmed in FORTRAN, while the 14xx series machines were programmed in COBOL and RPG (a delightfully archaic language).

As IBM moved into the 1960's, people were aware of the potential of integrated circuits. Jack Kilby at Texas Instruments had demonstrated the first hybrid (multi-chip, one chip per transistor or diode) integrated circuit in 1958, and shortly after that Robert Noyce at Fairchild Semiconductor had developed the monolithic silicon integrated circuit (where all the transistors and other components of the circuit are fabricated on a single chip).

IBM marketing and academics were in reasonable agreement, at this point, that you could identify 3 generations of computers:

• First generation computers were built with vacuum tubes and had a hodgepodge of different memory technologies.
• Second generation computers were built using transistors and core memory.
• Third generation computers were expected to be built using integrated circuits and core memory.

In this context, IBM set out to build a radical new family of machines, using integrated circuit technology and core memory that would be equally good at running FORTRAN and COBOL programs and could be sold in all market sectors. Naturally, they named this new machine the IBM System/360 -- third generation computers for the 1960's.

The chief architect of the System/360 was Gene Amdahl. Fredereck P. Brooks Jr. was chief architect of OS/360 (the operating system developed for the new machine), and Gerrit Anne Blaau made major contributions to the overall architecture. All three were alumni of IBM's 7030 Stretch project, an effort to produce what was, by the standards of the time, a cutting edge supercomputer -- only about 10 machines were built, but it was one of the most ambitious computer hardware projects ever, and many have judged it to be one of the biggest project management failures in the history of computing.

Major Accomplishments:

The IBM System/360 established the 8-bit byte as standard -- Blaau pushed aggressively for the change from 6 to 8 bits. The term byte was coined early in the development of the Stretch system and became standard computer-industry jargon as a result of the success of the System/360.

The machine supported 8, 16, 32 and 64-bit operands. It was the first machine to offer this mix of operand sizes, sizes we now take for granted as standard.

As a consequence of the above, the entire computer industry migrated from 7-track tape drives (the standard on first and second generation machines) to 9-track drives. Tapes were the most common way to ship and store bulk data prior to the developmet of high-bandwidth networks and genuinely high capacity disk drives.

The IBM System/360 introduced the notion of a set of condition codes that were set by the most recent ALU operation and could be tested with conditional branch instructions. Prior to this, essentially all conditional branches were based on testing a register for its sign or equality to zero, although some machines had one extra bit in the (usually single) accumulator in order to allow testing for overflow.

The IBM System/360 included what IBM called I/O channel processors. These were secondary processors, less powerful than full-scale CPUs but with access to memory. Channel processors allowed I/O devices to operate in parallel with the CPU, with I/O transfers controlled by channel programs. Note that channel processors did not include ALUs. They could only move blocks of data to and from devices, but one channel program could direct numerous block transfers before signalling the CPU that it was done with an interrupt.

The machine made extensive use of indexed addressing and general-purpose registers. Indexing dates back to 1949 on the Manchester Mark 1. Typical late first-generation computers had a single index register, but the 360 used the concept of general-purpose registers, where each of the general purpose registers in the CPU could serve equally as an index register or as an accumulator.

Features:

All of the models of the IBM System/360 were built with IBM's proprietary Solid Logic Technology. This was a hybrid integrated circuit technology based on 16-pin square ceramic substrate modules with silk-screened resistors and individual diode and transistor chips mounted on the substrate. (The DEC PDP-8, introduced at about the same time, used a similar technology.)

16 general purpose registers, 32-bits (one word) each, 15 of which could be used for indexed addressing.

Support for byte, halfword and word operands, and for word and double-word floating point.

Two 16-bit instructions per word, with memory-reference instructions occupying two consecutive halfwords. (There were some less-used 3-halfword instructions.)

The most common operations were supported by 3 instructions each. One was register-to-register, one short memory-to-register and one offering the full complexity of the machine's memory addressing model. While you can think of these as addressing modes, there was no "addressing mode" field of the machine instructions.

The fully general addressing mode had a 12-bit displacement field (disp) and two 4-bit register fields, the index register (x) and the base register (b). Any general purpose register from 1 to 15 could be named as an index or base register; the register number 0 always gave the constant value zero. In effect, register zero was available for use as an accumulator but was not used for indexing or as a base register. The effective address was M[R[x]+R[b]+disp].

The memory addressing model of the 360 encouraged programmers to think in terms of a segmented memory, with base registers pointing to the first byte of each currently active segment and index registers used for indexing within segments. Users could think in terms of segments holding activation records, or subroutines or objects. Segments, as used here, were not necessarily protected in any way, but using segments as objects was natural.

In a very real sense, the 360's use of base registers to refer to logical segments of a program's address space can be seen as a reaction to the B5000 segmented addressing model. The decision to use a 12-bit displacement (with byte addressing) suggests that typical segments would be under 4K bytes. This allows for small local arrays in an activation record, but if you want larger arrays, put a pointer to the array in the activation record. Again, this is reminiscient of the way programmers on the B5000 were forced to work.

The System/360 did not include any protection mechanisms in this addressing model (they did have protection mechanisms, but they were unrelated to addressing), programmers were free to use arbitrary arithmetic to compute the contents of a base register, and therefore, free to address all of memory.

Legacy:

The IBM System 360 was implemented over and over, and it began as a planned family of computers spanning a broad range of price and performance. A complete listing is not reasonable here, but here are the high points:

• Model 30 -- shipped April 1965, included an IBM 1400-series emulator, based on an 8-bit byte-serial microarchitecture, with a maximum of 64K bytes of core memory. Achieved 10,000 instructions per second.

• Model 40 -- a mid-sized machine, shipped April 1965, 40,000 instructions per second.
• Model 50 -- a mid-sized machine, shipped August 1965, 133,000 instructions per second.

• Model 20 -- shipped March 1966, only 8 registers and as little as 4K bytes of RAM, with a 16-bit ALU. We'd call this a 16-bit minicomputer, but it was upward compatible with the family. 2000 instructions per second!

• Model 65 -- a big machine, first shipped late 1965, 563,000 instructions per second.

• Model 75 -- a big machine, first shipped early 1966, 940,000 instructions per second.

• Model 67 -- the first 360 with an MMU, based on the Model 65 CPU, shipped 1966, but only a small number were ever delivered to customers (the University of Michigan and Carnegie-Mellon University were among the few who accepted delivery) because IBM had extreme difficulty debugging their timesharing system that was to have been the primary operating system for this model.

• Model 91 -- a pipelined CPU that anticipated what would become the dominant approach to high performance CPU implementation today, including out-of-order execution, shipped 1967, 1.9 million instructions per second.

• Model 85 -- introduced the use of cache memory, delivered 1969, 3.2 million instructions per second.

• The IBM System/370 (a third generation machine for the 1970s?) maintained full upward compatability with the System/360. All models of the 370 used monolithic integrated circuits, and as semiconductor memory prices declined, later and smaller models used semiconductor memory.

• The IBM Enterprise Server family, introduced in 1990 continued to support the same basic instruction set, and compatability has been maintained with the current zSeries machines.

• The IBM PC-XT/370 was an x86-based IBM PC-XT with added hardware to provide full emulation for an IBM System/370.