This document describes VC8E (M885/M869) OMNIBUS point-plot display sold with the PDP-8/E, -8/F, -8/M and -8/A computers. Earlier point-plot display interfaces on the PDP-8 family were not compatable with the VC8E! Point-plot display interfaces allow the computer to directly control the X and Y deflection voltage output to CRT displays and analog plotters.
00 01 02 03 04 05 06 07 08 09 10 11 ___________________________________ | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__| | | | | Coordinate | | |The X and Y coordinate registers are write-only registers that hold the coordinates to be converted to analog form for presentation on the output device. On the VC8E, as with most earlier PDP-8 display interfaces, only the least significant 10 bits of each register is used. The value is interpreted as a 2's complement value, with 0000 representing the center of the display area and negative values to the lower (on the Y axis) or left (on the X axis) side of the screen.
00 01 02 03 04 05 06 07 08 09 10 11 ___________________________________ | | | | | | | | | | | | | |__|__|__|__|__|__|__|__|__|__|__|__| | | | | | | | | | |DN| Ignored |WT ST ER CO CH IE|Note that bits 1 to 5 were not stored in the enable status register, and that bits 6 to 9 (WT through CO) were well documented but only implemented on VC8E systems based on M869 Rev D or higher and M885 Rev F or higher.
The CH bit is intended for use with addressable displays such as the VR14 and VR20. These displays decode this one-bit address line and ignore intensify commands if the CH output does not equal the selected display. This allows one VC8E interface to control two displays. When used with pen plotters, the CH bit is the recommended control for pen-up/pen-down; this is driven by a TTL line driver.
The CO bit is intended for use with two-color displays such as the VR20. On that display, a one in this bit causes a red display, while a zero causes a green display. If any VR20 displays were ever sold, they were discontinued by August of 1973, and this bit is only supported on VC8E interfaces using M869 Rev D or higher and M885 Rev F or higher.
The ER, ST and WT bits are intended for use with storage scopes such as the Tektronix 611 or 613. Outputting a one to ER will cause an erase pulse, If ST is off, the storage scope will not be in store mode. If ST is on, the flood beam will be turned on, causing a faint green background glow and causing plotted points to be stored. The WT bit causes the writing beam to be defocused during the intensify pulse, displaying a non-storing dim ellipse instead of a stored point. These bits are only supported on VC8E interfaces using M869 Rev D or higher and M885 Rev F or higher.
00 01 02 03 04 05 06 07 08 09 10 11 ___________________________________ | 1| 1| 0| 0| 0| | 1| 0| 1| | | | |__|__|__|__|__|__|__|__|__|__|__|__| | | | | | IOT | VC8E | Op |The point plot display was usually connected as device 05, and the fixed op-codes used for point plot display instructions assume this. An optional second VC8E could be connected at address 15 by changing the jumpering of W1 and W2 on the M869.
Clear all display flags, disable interrupts and reset done. This is equivalent to a console reset. Not supported by the display interfaces on PDP-8 models prior to the PDP-8/E, and thus should be avoided in portable code.
Resets DN (the done flag) in the command/status register.
Skips the next instruction if DN (the done flag) is set; does not clear DN.
The contents of the accumulator is loaded into the X or Y register; this does not clear the accumulator. Both the DILX and DILY commands set the done flag after an appropriate interval determined by the display type.
The digital to analog converters in the VC8E have a settling time of 4 microseconds and an output swing of +/- 5 volts.
On the VC8E, switch SW2 on the M869 board selects between a 21 microsecond delay for the VR14/VR20 and a 6 microsecond delay for the Tektronix 602, 611 and 613. A single timer is shared by both the DILX and DILY commands; if either DILX or DILY are called while this timer is active, it will be reset.
An 1 microsecond intensify pulse is output to the display, causing a spot to be displayed at the current X and Y locations. This should be done only when DN (the done flag) has been set indicating that the X and Y digital to analog converters have settled after the most recent DILX or DILY; if not, the displayed point may not be at the intended location.
The intensify pulse polarity is set by switch SW1 on the M869; the intensify pulse duration is determined by a capacitor on the M869. The standard intensify pulse swings from +4 to -2 volts, but jumper AB on the M885 board can be used to change this to +4 to -10.
The enable/status register is loaded from the accumulator, and the accumulator is cleared. This does not load DN (the done flag).
If the ER (erase) bit is set in the value loaded, and if the VC8E is equipped to handle this option, an erase cycle begins. This will cause a 450 millisecond erase pulse to be output, after which the DN (done) flag will be set. On the Tektronix 611 and 613 storage scopes, the erase pulse will cause a bright green flash as it erases the stored information.
If the CO (color) bit changes because of the value loaded, and if the VC8E is equipped to handle this option, a timer will be started to set the DN (done) bit after either 300 microseconds (green to red) or 1600 microseconds (red to green). These delays correspond to the time taken by the VR20 display for these color changes.
The contents of the enable/status register are read into the accumulator. ER (erase) and any unimplemented bits are always read as zero.
DILC= 6050 / Display logic clear DICD= 6051 / Display clear done DISD= 6052 / Display skip if done DILX= 6053 / Display load x DILY= 6054 / Display load y DIXY= 6055 / Display intensify at (x,y) DILE= 6056 / Display load enable DIRE= 6057 / Display read enable
Given these definitions, here is a routine to display one point, given a pointer to the XY pair, in memory:
DSPDOT, .-. /Display dot on CRT / takes addr of XY pair in AC / returns AC=null CMA IAC CMA / decrement pointer DCA X1 / put in autoindex reg TAD I X1 / get X DILX CLA TAD I X1 / get Y DILY DISD / wait for settling interval JMP .-1 DIXY / display point CLA JMP I DSPDOT / returnIn fact, this is not a very sensible way to write the code, since it wastes time while the X and Y outputs settle that could be spent on some other purpose. Graphics display software using a point-plot interface without a storage scope must contantly cycle through the list of points to display, the display-list; as a result, it makes far more sense to re-write the above code as follows:
DSPDOT, .-. /Display dot on CRT / takes addr of XY pair in AC / returns AC=null CMA IAC CMA / decrement pointer DCA X1 / put in autoindex reg DISD / wait until done JMP .-1 DIXY / display previous point TAD I X1 / get X for new point DILX CLA TAD I X1 / get Y for new point DILY CLA JMP I DSPDOT / returnOne weakness of this code is that, before the very first call to DSPDOT, the X and Y registers are uninitialized. As a result, one random dot will be plotted before the first cycle through the display list; unless a storage scope is in use, this will not cause any problem because the spot will fade in a few milliseconds.
DEC's small computer handbook suggests the following fun program for the VC8E to display kaleidoscopic patterns of arcs and dots on the screen:
/ Kaleidoscope program for the VC8E/VR14 scope. / Based on suggestions from page 6-19 of the Small Computer / Handbook, 1973. / The advice given is to experiment with settings of / the switch register bit positions 9, 10 and 11, leaving / all higher bits zero. The advice is good; this is a / nice "screen saver" for non-storage scopes. DISD= 6052 DILX= 6053 DILY= 6054 DIXY= 6055 * 200 START, TAD Y JMS SCALE CMA TAD X DCA X / X = X - SCALE(Y) TAD X DILX JMS SCALE TAD Y DILY DISD JMP .-1 DIXY DCA Y / Y = Y - SCALE(X) JMP START X, 3777 / any initial value works, but Y, 6 / 0,0 is least interesting. / Divide AC by 2**SR SCALE, .-. DCA TEM OSR CIA DCA C TAD TEM CLL SPA CML RAR / Arithmetic right shift ISZ C JMP .-5 JMP I SCALE TEM, .-. C, .-. $