Machine Problem 5, due Apr. 15

Part of the homework for CS:2820, Spring 2019
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science

Starting Point: Start with the posted solution to MP4. Break it up into multiple source files and verify that it still works. Then set to work on class InputCountGate. This is the only class you will modify, and when you submit your solution, you will submit file InputCountGate.java in the mp5 submit directory for your section.

The Problem: Aside from breaking the MP4 solution into pieces, the big problem is as follows: As currently written, logic gates have no limit to how short an output pulse they can produce. Consider this little logic circuit:

gate a input 0 1.0 1
gate b xor 0.1
wire a 1.0 b 1.0 b

Here is the simulation output from the posted solution to MP4 on this input:

time 1.0 0->1 Gate a input 0 1.0 1
time 2.0 0->1 Wire a 1.0 b
time 2.0 0->1 Wire a 1.0 b
time 2.1 0->1 Gate b xor 0.1
time 2.1 1->0 Gate b xor 0.1

At time 2.0, this simulation shows the two inputs to the exclusive or gate changing. They both change at the same simulated time, so it hardly matters which wire is which.

The problem is, at time 2.1, the output of the exclusive or gate changes, first from 0 to 1 and then back from 1 to 0. It stays 1 for a total of 0.0 time units, so nothing actually happens. The problem is, these infinitesimal pulses can trigger things farther down in the simulation that should not happen.

Real logic gates do not do this! In a real logic gate, the shortest possible output pulse is typically comparable in length to the delay of the logic gate. Any attempt to make the gate produce an output pulse shorter than that will lead to no significant change in the output.

Actually, real logic circuits are a bit more complex. For pulses below some length, the amplitude of the pulse starts to fall, until it is small enough not to cause a response. Electrical engineers describe this behavior by saying that the gate acts as a low-pass filter, passing low-frequecy signals and suppressing high frequency signals, where the period of the cutoff frequency is about twice the delay of the gate.

Simulation always involves some approximation of the real world, so we will ignore questions of amplitude and gradual transition from pulse to no pulse and simply say that there is a sharp cutoff. Pulses shorter than the delay of the logic gate simply don't happen, and the cutoff is exactly the same as the delay of the logic gate.

Your job is to fix class InputCountGate.java so that it approximates the low-pass filter behavior of gates. Hint: The difference between problems 2 and 3 on Exam II is relevant to understanding how to do this. The only thing is, that involved wires, not gates.

As Usual: Up-to-date Javadoc comments on all non-private methods are required, and the class-level comments must claim you as author and give the date on which you completed your submission.