Core MemoryThe dominant technology from 1960 to 1980
by
Douglas W. Jones
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Date: 1960?
Capacity: 4K × 2
Core area per bit: 6.45 mm2
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Date: 1970 (introduced 1969, some say 1968)
Capacity: 640 × 6?
Core area per bit: 0.89 mm2?
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Date: 1972 (introduced 1970)
Capacity: 4K × 12
Core area per bit: 0.28 mm2
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Date: 1977 (introduced 1974)
Capacity: 8K × 12
Core area per bit: 0.13 mm2
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For the transformer to function, it must be made of a magnetic material. In a power transformer, we use soft magnetic materials, where the magnetization of the core is linearly proportional to the current through the core. If we push current through the data-in wire, it will magnetize the core, and the change in magnetization in the core will induce a voltage in the sense wire. The arrows show the direction of the current in the data-in wire, the direction in which the core is magnetized, and the direction that the voltage in the sense wire is attempting to push curent. If the sense wire is made into a loop with zero resistance, the current in the sense wire will be equal to the current in the data-in wire in such a way that the total magnetization of the core is always zero.
Hysteresis and Saturation: Real magnetic materials aren't like the ideal soft magnetic materials described above. First, they can only be magnetized up to some point. Above that point, we say that the core is saturated. Increasing the current above the saturation point doesn't increase the magnetization. Second, real ferromagnetic materials exhibit hysteresis. That is, once you apply some current to magnetize them, they tend to stay magnetized and you have to apply at least a little current in the opposite direction to get them completely demagnetized.
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For hard magnetic materials, including the ferrite used in core memories, tool steel and the alloys used in permanent magnets, reducing the current H to zero leaves the core magnetized, so B is not zero. If the current is reversed to saturate the core in the opposite direction and then released, B will be non-zero, which is to say, the core will be magnetized in the opposite direction.
Now, consider how a core made of a hard magnetic materal responds to a current pulse. If the core is already magnetized in the direction that current pulse would induce, the current pulse will only cause a small change in the magnetization, so only a small pulse will be seen on the sense line. In contrast, if the core is magnetized in the opposite direction, there will be a big change in the magnetization, so there will be a big pulse on the sense line.
Note: For the core memories discussed here, reading the data stored in a core always involves erasing that data. You have to set it to zero to see if it was a one. If you want the data to remain unchanged after reading, the control system must refresh the data by rewriting the bits that should be one.
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In the figure to the right, showing a plane of 16 cores, 4 per row. This requires 4 X select lines and 4 Y select lines. Applying simultaneous current pulses to the X1 and Y2 lines selects just one core, shown shaded. There will be a pulse on the sense line of the magnetization of that core flips, and no pulse (or a much smaller pulse) if it does not.
If we are only interested in accessing one bit at a time, a read or write cycle would begin with negative pulses on both the selected X and Y lines in order to reset the addressed core, and read it if this is a read cycle, and then a positive pulse on one select line (say the X line) with and only if the bit is to be set to 1, a positive pulse on the other select line (say the Y line).
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In wiring a core stack, the corresponding X and Y lines of each plane are wired in series, while a separate sense line is used for each plane. For example, the X1 line is threaded through the corresponding cores in both planes. Now, if we apply simultaneous pulses to the, X1 and Y2 lines, we will select two cores, one in each plane, shown shaded in the figure to the right. We can reset the sense of both cores with such a pulse, reading out their previous values on the two sense lines, S0 and S1.
Inhibit Logic:
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The inhibit wire is strung through all the wires of each core plane, parallel to one of the select lines. Here, it is shown parallel to the Y select line. When no current flows through the inhibit line, the Y select line operates normally. When it is desired to inhibit the writing of a one to this core plane, a pulse is sent on the inhibit line that is opposite to the direction of the pulse in the Y line. This prevents the pulse on the Y line from having any effect on the addressed core. Note that the pulse on the inhibit line goes through all of the cores on the same plane, so it adds to the pulses on the X select lines. For all of the non-selected X lines, where there is no pulse to add to, the amplitude is not enough to flip the cores. For the selected X line, the amplitude exactly cancels the pulse on that line, so again, no cores are flipped.
Later, particularly in the 1970s, the roles of the sense and inhibit lines were combined, so that onlly 3 lines passed through each core. This required more complex drivers on the sense-inhibit lines, and it required sense amplifiers that were insensitive to the voltages involved in driving the inhibit pulses, but this complexity was cancelled by the reduction in the number of wires through each core.
The weaving of the sense line S shown in the figures above is the classical one. The meandering path through all of the cores minimizes the crosstalk between the X and Y lines and the sense line, but it prevents the cores from being tightly packed and it is difficult to thread the sense line along this serpentine path. As a result, many other core organizations were developed by the late 1960s that allowed semi-automated threading of the cores and made wire breakage during threading a less common event.