Assignment 13, due Jul 31
Part of
the homework for CS:2630, Summer 2018
|
On every assignment, write your name legibly as it appears on your University ID card! Homework is due on paper at the start of class on the day indicated (Tuesday or Thursday). Exceptions will be made only by advance arrangement (excepting "acts of God"). Late work must be turned in to the TA's mailbox (ask the CS receptionist in 14 MLH for help). Never push homework under someone's door!
a) Write a sequence of Hawk instructions that maps the first page of the Hawk ROM (containing the entire Hawk monitor) to frame 0 of the virtual address space, and sets the access rights appropriately. (0.5 points)
b) Write a sequence of Hawk instructions that maps the first page of the Hawk RAM to frame 1016 of the virtual address space, and makes the mapping and sets the access rights appropriately. (0.5 points)
FIRST: CPUGET R1,TSV CPUGET R3,TPC STORE R1,R2,svR2 STORE R3,R2,svPC CPUGET R1,TMA CPUGET R3,PSW STORE R1,R2,svMA STORE R3,R2,svPSW SECOND: CPUGET R1,TSV STORE R1,R2,svR2 CPUGET R1,TPC STORE R1,R2,svPC CPUGET R1,TMA STORE R1,R2,svMA CPUGET R1,PSW STORE R1,R2,svPSW
These two pieces of code do exactly the same thing. The first solution uses two registers, the second uses only one. If we did not have pipelined computers, the two alternatives would be equally fast, but on a pipelined machine, one alternative is distinctly faster than the other.
a) Which alternative is faster on a pipelined computer, and why? (0.5 points)
b) How much faster? You can answer this by careful use of a pipeline diagram. The answer will be a number, a count of the number of clock cycles saved by the faster solution when compared to the slower solution. (0.5 points)
a) What does this diagram imply about the word size of the data fetched from RAM for each instruction, and how does this differ from the Sparrowhawk? (0.5 points)
b) What additional issue does the Hawk raise that would add even more complexity to this pipeline stage? (0.5 points)