Assignment 12, due Apr 27

On every assignment, write your name legibly as it appears on your University ID card! Homework is due on paper at the start of class on the day indicated (usually Friday). Exceptions will be made only by advance arrangement (excepting "acts of God"). Late work must be turned in to the TA's mailbox (ask the CS receptionist in 14 MLH for help). Never push homework under someone's door!

Notice: This assignment is entirely prepratory for the final programming project.

1. Background: The Hawk has several undefined instructions. Here, we define undefined entirely in terms of the opcode field (or fields) and not in terms of values of other fields. For example, in addition to undefined instructions, there are instructions that are not defined when some register field equals zero -- ignore these!

   a) Identify all of the undefined instrucitons in the Hawk instruction set. For each, give the opcode in hexadecimal, with X replacing fields of the instruction halfward that are not part of the opcode. (0.5 points)

   b) For each of the above, classify it as one where the CPU architecture would encourage defining it as a short instruction (16 bits), or a long instruction (32 bits), and whether the fields you marked with X in part a should best be interpreted as identifying registers or something else. (0.5 points)

2. Background: Assume you are writing code within a trap handler, where the registers are saved the trap save area pointed to by R2, as in the trap framework defined in Chapter 13 of the hawk manual. Assume that the entire CPU state has been saved.

   a) Write a code fragment that loads the instruction pointed to by the saved program counter into R3. This should only take 2 to 4 instructions, but note, you have a halfword pointer, so one of these instrucitons will need to be EXTH. (0.5 points)

   b) Write a code fragment that assumes that an instruction halfword has been loaded into R3 and extracts bits 8 to 11 (the destination register field) into the low 4 bits of R4. This should only take 2 to 4 instructions. (0.5 points)

   c) Write a code fragment that assumes that an instruction halfword has been loaded into R3 and branches to ISADDC if the opcode is the opcode for the ADDC instruction. You may use R5 as a temporary register. This should only take 2 to 4 instructions. (Note that, since the ADDC instruction is not undefined, the trap handler would never see this instruction; ADDC is used here to set an example that does not conflict with problem 1.) (0.5 points)

   d) Write a code fragment that assumes that the low 4 bits of R4 hold a register number extracted from the instruction that caused the trap and loads R5 with the contents of the memory location pointed to by the value the user had in that register at the time of the trap. This should only take 2 to 4 instructions.

Machine Problem 6, Due April 30

Write an undefined instruction trap handler that interprets the only undefined instruction in two-register format (Appendix B.1.9 of the Hawk manual) to give it the following semantics:

MOVEM dst,src   M[dst] = M[src]

That is, both the src and dst registers are used as pointers to memory locations, and the data in the memory location pointed to by the source register is copied to the location pointed to by the destination register. Thus, a programmer could replace this sequence of instructions

        LOADS   R3,R4
        STORES  R3,R5

With this instruction

        MOVEM   R5,R4

This not only saves one instruction, it also avoids using one register. Of course, implementing it in a trap handler does not lead to fast execution, but if some newer version of the Hawk CPU supported this in hardware, your trap handler could be used to ensure that applications will run on older CPUs.

If your trap handler detects any other undefined instructions, it should print out the specifics and halt by returning from the trap with the saved program counter set to zero. In printing the specifics, note that you do not know the status of the display at the time of the trap. therefore, it is best to do the following:

	dspini()           -- re-initialize display
	puts( "Instr trap PC = " ) -- the first part of the error msg.
	puthex( saved_PC ) -- output the saved PC
	saved_PC = 0       -- force halt on return from trap

The collected skeletal code for a trap handler, cribbed from Chapter 13 of the Hawk manual, with one small correction and added flesh, is given in the file
-- http://homepage.cs.uiowa.edu/~dwjones/assem/hw/mp6.txt
All the code you need to add is at the end, but do not forget to modify the comments at the start in order to take responsibility for your code. As a matter of professional behavior, all programs should include a header comment tracking who wrote the code. If someone else wrote part of the code, the header comment should give them credit, and if you lift code from some other source, comments on the lifted code should identify the source!

A test program for testing your trap handler is provided in
-- http://homepage.cs.uiowa.edu/~dwjones/assem/hw/mp6test.txt
Assemble this, assemble your trap handler, and then link the two and run them with these commands:

        link mp6.o mp6test.o
        hawk link.o

Note that the test program does not have any external reference to the trap handler, nor does the trap handler know of the existence of the test program unitl the actual moment of a trap.

Submission

Submit just the code for your trap handler, that is, the file mp6.o You will be graded on legibility, clean code structure, and of course, on whether your code functions correctly.