Assignment 7, Solutions

Part of the homework for 22C:60 (CS:2630), Spring 2012
by Douglas W. Jones
THE UNIVERSITY OF IOWA Department of Computer Science

  1. Background: Here is a C subroutine to copy a string from here to there while converting all lower-case letters to upper case: 
    void upcase( char * src; char * dst ) {
    char ch;
    do {
        ch = *src;
        if ((ch >= 'a') && (ch <='z')) {
            ch = ch + ('A' - 'a');
        }
        *dst = ch;
	src = src + 1;
	dst = dst + 1;
    } while (ch != NULL);
}


    UPCASE: ; expects R3 = src -- pointer to source string
        ;         R4 = dst -- pointer to destination string
        ; uses    R5 = ch  -- one character being processed
        ;         R6 = temp
        ; returns R3-6 with unpredictable contents
UPLOOP:                         ; do {
        LOADS   R5,R3
        EXTB    R5,R5,R3        ;   ch = *src
        CMPI    R5,'a'
	BLT     UPENDF
        CMPI    R5,'z'
	BGT     UPENDF          ;   if ((ch>='a')&&(ch<='z')) {
	ADDI    R5,R5,'A'-'a'   ;     ch = ch + ('a' - 'A')
UPENDF:                         ;   }
        LOADS   R6,R4
        STUFFB  R6,R5,R4
        STORES  R6,R4           ;   *dst = ch;
        ADDSI   R3,1            ;   src = src + 1;
        ADDSI   R4,1            ;   dst = dst + 1;
        TESTR   R5
        BZR     UPLOOP          ; } while (ch != NULL)
        JUMPS   R1

    A Problem: Write an equivalent SMAL Hawk subroutine that takes R3 as the source address and R4 as the destination address, and conforms to the standard Hawk calling sequence. (1.0 points)

  2. A Problem with two parts: Redraw the schematic for the 4-input multiplexor given in Chapter 8 of the notes so that:

    a) ... it uses explicit inverters instead of bubbles on inputs to gates. (0.4 points)

    b) ... so that, as a result of applying De Morgan's laws, it only uses nand gates and does not use any and or or gates. (0.4 points)

    Note: Neatness counts. Graph paper, rulers and other tools can all help.

  3. A problem: An exclusive-or gate can be made from a 2-input multiplexor and an inverter. Compare the implementation of th exclusive-or funtion given at the start of Chapter 8 with the implementation of a 2-input multiplexor given 2/3 of the way through the chapter, and then explain how to construct an exclusive-or gate from a 2-input multiplexor and a small amount of additional logic. (0.4 points)

  4. Background: A one-bit stage of a subtractor has inputs si, a bit of the subtrahend, mi, a bit of the minuend, and bi, the borrow in to that stage of the subtractor. The outputs are di, one bit of the difference, and bi+1, the borrow in to the next higher stage of the subtractor.

    A problem: Give the truth table for a one-bit stage of a subtractor. (0.8 points)

    Note: You may find that the discussion of an adder-subtractor in the section of Chapter 8 on arithmetic logic units provides useful insight.

    si mi bi di bi+1
    0 0 0 0 0
    0 0 1 1 1
    0 1 0 1 1
    0 1 1 0 1
    1 0 0 1 0
    1 0 1 0 0
    1 1 0 0 0
    1 1 1 1 1