Assignment 13, not due

This assignment is not to be turned in, but is designed to help you study and elicit questions.

1. Look at the addressing modes supported by the PDP-11 (see chapter 6). Which of these addressing modes are not supported by the Hawk?

2. What is the difference between the program counter and the location counter?

3. (Related to the above) explain how this instruction is assembled, assuming that the label LAB is defined somewhere in the same program.

           LOAD    R5,LAB
   

4. What addressing mode does the above instruction use.

5. What is the maximum number of distinct memory pages that can be referenced during the execution of a single Hawk instruction? What instruction or instructions achieve this maximum?

6. What powers of 2 are closest to 1000, 1000,000, 1000,000,000 and 1000,000,000,000?

7. Here are two blocks of equivalent SMAL Hawk code that could be in the try block of an exception handler:

           LOAD  R4,R1,EXHAND    ; -- first version
           STORE R4,R2,ARSIZE+EXHAND
           LOAD  R4,R1,XAR
           STORE R4,R2,ARSIZE+EXAR
   
           LOAD  R4,R1,EXHAND    ; -- second version
           LOAD  R5,R1,XAR
           STORE R4,R2,ARSIZE+EXHAND
           STORE R5,R2,ARSIZE+EXAR
   

   Which version would be faster, and why?

8. Explain the hidden bit in the IEEE floating point format. How does it work and why is it used?

9. We've seen 3 different examples of virtualization in this class that used very different approaches:
   • The Hawk computer itself is entirely implemented by a C program (it's one of the downloads on the course web page). This C program completely implements the fetch-execute cycle of the Hawk.

   • The LOADSNA macro in Homework 6 adds what looks like a new instruction to the Hawk instruction set, where in fact, it assembles to a sequence of regular Hawk instructions.

   • The LOADNA instruction from Machine Problem 6 is implemented by a trap service routine, so that even the binary encoding of the instruction looks like a real machine instruction.

   What are the strengths and weaknesses of these approaches to virtualizaiton? Consider performance penalties, memory requirements and the extent to which the programmer needs to be aware of what features are implemented in hardware and what features are implemented in software.

10. All of the Hawk shift instructions take a constant shift count. Suppose you wanted the equivalent of the C statement i=i<<j where i is in R3 and j is in R4. How would you do this on the Hawk?

11. Suppose a is a huge array of unsigned integers, where each integer is just 4 bits. The array is so huge that you need to pack it with 8 array entries per 32-bit word, so a[0] occupies bits 0 to 3 of the first word of the array. Can you write C code to access a[i] assuming that a has been declared as an array of characters? Assuming that a is declared as an array of unsigned 32-bit integers? Can you write SMAL Hawk code to put a[i] in R3 assuming that the address of a is in R4 and the value i is in R5?