a) How frequently must the keyboard-ready bit be polled to keep up with a fast typist? (0.3 points)
60 words per minute at 5 letters per word plus a space between words is 360 characters per minute or 6 characters per second.
Therefore, the keyboard ready bit must be checked at least 6 times per second to avoid data loss. 1/6 second is 166 milliseconds, so we must check the ready bit every 166 milliseconds.
b) How many times a second will the KBGETC routine from the Hawk Monitor poll the ready bit while it is waiting for input? (0.3 points)
If our machine really runs at 1,000,000,000 instructions per second (there is reason to doubt this for any instructions that check I/O status registers, since access to them cannot be accelerated by a cache), that is 1 nanosecond per instruction.
The polling loop inside KBGETC is 2 instructions long, so it re-tests the keyboard status every 2 nanoseconds.
c) How do the above considerations motivate the introduction of interrupt mechanisms in CPU design. (Open ended question). (0.4 points)
The answer to part a) was bit every 166 milliseconds. The answer to part b) was bit every 2 nanoseconds. That means that the polling loop is polling the polling the status bit 83,000,000 times faster than necessary. This means that there is time for a considerable amount of computation between tests of the polling loop. Interrupt mechanisms provide one way to automate the polling so that computation can proceed normally without concern for polling.
- Data[0-7] -- 8 data lines, computer to device.
- Busy -- device to computer. High means device is busy printing, while low means device is ready to print another character.
- Ack -- device to computer. Low acknowledges that device has seen data while high means device has not yet inspected the data.
- Strobe -- computer to device. Low means data is available while high means the data lines are not valid.
a) Give a timing diagram showing Data, Strobe and Ack and Busy as a function of time as the computer sends 2 characters to the printer which then prints them. You can show just two data values, call them valid and invalid. (0.5 points)
valid valid
| ____________ ____________
Data |--------____________--------____________--------
|__________ ____________ __________
Strobe | |______| |______|
|______________ ____________ ______
Ack | |______| |______|
| _______ _______
Busy |___________________| |___________| |
|_________________________________________________
time ------>
b) Give pseudocode -- it need not be in a real programming language -- for the parallel port print ppprint(ch) routine, focusing on waiting for the right conditions reported by the printer and setting the outputs appropriately at the right times. (0.5 points)
ppprint(ch) {
while (ppstatus.ack == 0) wait;
ppdata = ch;
while (ppstatus.busy == 1) wait;
ppstatus.strobe == 0;
while (ppstatus.ack == 1) wait;
ppstatus.strobe == 1;
}
- a, b -- Inputs
- c, d -- Outputs
- c = a and d
- d = b or c
This circuit is a memory device, a kind of flipflop. It can be made to remember one bit.
a) Draw this circuit as a logic diagram. (0.4 points)
b) Give a table showing the 4 input combinations, identifying the combinations that set and reset the flipflop and the combination that allows it to remember. The final combination is the one that should usually be avoided. (0.4 points)
a b c d 0 0 0 0 Reset 0 1 0 1 (avoid) 1 0 0/1 0/1 Remember 1 1 1 1 Set
c) When it is remembering a stored value, are the outputs of this flipflop the same or different? (0.2 points)
The same.