Assignment 10, due Apr 11
Always, on every assignment, please write your name legibly as it appears on your University ID and on the class list!
The notes for lecture 28 do cover branch instructions, but only in terms of what must be added to earlier pipeline stages to make branches work. There is no coverage of what the operand store stage does.
A Problem: Give the details of the operand store stage that treats stores to register 15 as branch instructions. Use a level of detail comparable to the level of detail in the rest of the notes for Lecutres 26 to 28.
Part A: For each starred mode, explain what it does and why this might have been deemed to be of marginal or no use.
Part B: At the start of the notes for Lecture 27, a bit of logic was suggested for the operand fetch stage that introduces a new set of addressing modes dubbed "short immediate" because they use the 4-bit register field as an immediate constant. Repeat the exercise from part A assuming that this enhancement is in place; you need not worry about modes 0001 and 0101 because they are accounted for in the notes, but which of the other starred modes have changed interpretations, and of them, what do those modes end up doing and why was the result deemed to be usless or of marginal use?
Part A: If the operand fetch stage simply reaches back in the pipeline to get a copy of the current program counter, what unexpected consequences would this have for the programmer? (Consider an instruction such as ADD R15,R15,X - a memory to register add to R15, using PC relative addressing with a displacement of X for the operand; this brings out the very worst in this proposal if we use the pipeline scheme described here.)
Part B: How should we have brought the value of the program counter forward to the operand fetch stagee in order to avoid the problem we found in part A.