Assignment 1 Solutions
Part of
the homework for 22C:122/55:132, Spring 2003
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No solution given
C 19 C++ 15 Java 15 Assembly 12 Basic 9 Pascal 6 Fortran 6 VHDL 6 -- but is this a programming language? Perl 6 Visual Basic 5 Prolog 4 PHP 4 -- is this a programming language? Ada 3 Matlab 2 -- we could argue about this too!
C 14 Java 11 C++ 9 Assembly 4 VHDL 4 Ada 3 Perl 3 Pascal 2
Motorola 68000 Series 10 MIPS 5 Intel 5 VAX 1 PDP-11 1 Here, I am concerned that so few claim any exposure to more than one architecture!
Motorola 68000 Series 7 MIPS 2 Here, I am concerned that this covers fewer students than are enrolled in the class. It would be nice if the students in this class all had some exposure to implementation issues.
A B C S1 S0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1
There was an error in the definition of Qc given in the assignment! It is corrected above; in summary, this device was supposed to be symmetrical, with each output depending on the two other outputs plus one of the inputs. The answers below are for the corrected circuit.
a) With all inputs high, what are the stable states of a tripflop?
stable states Qa Qb Qc 0 1 1 1 0 1 1 1 0
b) What do you do to the inputs of a tripflop to flip it into one of its stable states?
Make one of the inputs high and the others low. The output will then be the negation of the input. If all of the outputs are then made high, the output will remain in that state until some other input is pulled low.
Durring the fetch part of the instruction cycle, the opcode (and possibly other fields) of the next instruction is loaded into the IR and the address portion may be loaded into the MAR. Durring the execute part of the instruction cycle, control circuitry interprets the opcode and executes the instruction.
The state of the CPU must be saved. This might involve saving such things as condition codes, the interrupt enable bit or bits, processor privilege level, and other information.
One register will hold the data sent to the output pins so that they remain constant between output operations. One register will hold data presented to the input pins, although this may be a pseudo-register that looks, to software like a register, but involves no flipflops. Finally, there will be a control and status register that allows the output strobe and input acknowledge bits to be set and allows the input strobe and output acknowledge bits to be set.