Homework 8

22C:122/55:132, Spring 2001

Due Friday Mar 23, 2001, in class

Douglas W. Jones
  1. Background:

    Read Chapter 39 of Bell and Newell (Be warned that this 1964 vintage paper uses some terms in quaint ways; for example, the word stack has nothing to do with a data structure to which the operations push and pop apply.)

    Ignore, for the time being, the issues of peripheral processor use in the CDC 6600, and focus on the use of parallelism within the central processor.

    Part A: Contrast the way work is dispatched to functional units in the 6600 with the way work is dispatched to the functional units of a VLIW processor. What are the major differences, and what are the major similarities?

    Part B: Why does the CDC 6600 architecture need a scoreboard while VLIW architectures generally lack anything analagous to this structure.

  2. Background: The scoreboard function on the CDC 6600 is mentioned in the paper cited above, but the implementation is not documented. Consider the following scheme:

    A Question: What condition signalled by the bits in the scoreboard indicates that a functional unit may fetch its source operands. It may help to consider A=B+C and A=A+C and A=A+A as operations to evaluate your answer (where A, B and C are registers).

  3. A Question: Why doesn't the CDC 6600 need something analogous to a scoreboard to interlock multiple memory reference operations, for example, a sequence of instructions where one stores a result to some memory location and the next loads from that location.