1.
OF.need_register_r1
And RS.write_register
ANd OF.r1 = RS.r1

OF.need_register_r2
And RS.write_register
ANd OF.r2 = RS.r1

OF.need_register_r1
And ALU/MEM.write_register
ANd OF.r1 = ALU/MEM.r1

OF.need_register_r2
And ALU/MEM.write_register
ANd OF.r2 = ALU/MEM.r1

Interlock, stall IF and OF stages.


2.

There may be five forwarding paths:
         

OF.need_register_r1
And RS.write_register
ANd OF.r1 = RS.r1
Forward result from RS result register to OF op1 register.

OF.need_register_r2
And RS.write_register
ANd OF.r2 = RS.r1
Forward result from RS result register to OF op2 register.

Branch forwarding

RS.r1 == 0 (pc)
Forward from RS result register to PC.

The following two forwardings may require to run with a reduced 
clock rate.

OF.need_register_r1
And ALU.write_register
ANd OF.r1 = ALU.r1
Forward result from ALU to OF op1 register. 

OF.need_register_r2
And ALU.write_register
ANd OF.r2 = ALU.r1
Forward result from ALU to OF op2 register.