# Assignment 8, due Mar 26

Always, on every assignment, please write your name legibly as it appears on your University ID and on the class list! All assignments will be due on Fridays at the start of class, and unless there is what insurance companies call "an act of God", the only exceptions to this rule will be by advance arrangement.

1. Consider the example architecture given in the midterm study questions and the subject of much of the midterm exam. Consider this programming problem:

There is an array of one-word integers A (that starts at address 7FE616). The size of this array, in words is stored in the variable AS (at address 6A0716). Write code (that begins at address 500016), where your code computes the sum of the elements of A in register 1 and then jumps to memory address Q (which is 201F16). Parenthetic values are provided for the sake of example, but you are free to substitute symbolic constants into your code.

Give your result in semi-symbolic form. Here, for example, is a register to register move from R2 to R1, encoded as a load address instruction:

```	load-address R1 R2 000000
```

And here is code to add R3 to R5:

```	operate R5 R3 add no-skip store
```

In binary, these would have been:

```        1100010010000000
0001010011+++001
```

Note that none of the documentation gives the specific encoding used to make the ALU add, so you've got to fake it a bit if you try to give binary!

One other unspecified detail about the example architecture: Assume that the displacements used for IR.dd are signed 6-bit values from -32 to +31.

2. Cosider designing a coprocessor that can do both integer division and integer multiplication. In the style of the notes for Lecture 21, the division algorithm we will use is:
```              divide:
repeat n times -- division loop for an n-bit word
-- notation:  a|b means concatenate a and b, n-bits each
AC|MQ = AC|MQ << 1;