22C:122, Lecture Notes and Schedule, Fall 1999

Douglas W. Jones
University of Iowa Department of Computer Science

Lectures are at 1:30 Monday, Wednesday and Friday, Room 214 MacLean

These notes are subject to continuous revision up to the date of the indicated lecture!

Mon Aug 23 -- Introduction
Wed Aug 25 -- A breakneck review of digital logic
Fri Aug 27 -- A breakneck review of finite state automata
Mon Aug 30 -- A breakneck review of register transfer components
Wed Sep 01 -- Reduction of programs to register transfer systems
Fri Sep 03 -- A hardware description language
Mon Sep 06 [Labor Day holiday]
Wed Sep 08 -- The Ultimate RISC at the ISP level
Fri Sep 11 -- The Ultimate RISC at the Register Transfer level
Mon Sep 13 -- More Register Transfer design
Wed Sep 13 -- Review of bus-level design
Wed Sep 15 -- Bus Level components for The Ultimate RISC
Fri Sep 17 -- Information Theory and Instruction Coding
Mon Sep 20 [Yom Kippur, class cancelled]
Wed Sep 22 -- Stack machines: The Minimal CISC at the ISP and RT levels
Fri Sep 24 -- Optimal Instruction Coding for Stack Machines
Mon Sep 27 -- Fast addition (See Appendix A of the text)
Wed Sep 29 -- Fast multiplication (See Appendix A of the text)
Fri Oct 01 -- Fast Multiplication without hardware support!
Mon Oct 04 -- BCD Arithmetic
Wed Oct 06 -- Coprocessors (simple case of functional units)
Fri Oct 08 -- Systematic Instruction Set Design
Mon Oct 11 -- Review
Wed Oct 13 -- EXAM in class
Fri Oct 15 -- Pipelined functional units, vector processors (see appendix B)
Mon Oct 18 -- VLIW processors
Wed Oct 20 -- VLIW processors with pipelines
Fri Oct 22 -- Pipeline diagrams
Mon Oct 25 -- Branch and operand delay slots
Wed Oct 27 -- Implementing a pipelined CPU
Fri Oct 29 -- Interlock conditions
Mon Nov 01 -- Interlock logic, branches and skips
Wed Nov 02 -- Forwarding, out-of-order execution
Fri Nov 05 -- Variable length instructions
Mon Nov 08 -- Superscalar pipelines
Wed Nov 10 -- Condition codes, function calls
Fri Nov 12 -- Interrupts and Traps
Mon Nov 15 -- Interrupts in pipelined systems, Imprecise Traps.
Wed Nov 17 -- Bus Arbitration, Crossbar Switches
Fri Nov 19 -- Associative memory
Mon Nov 22 -- Write-through cache memory
Wed Nov 24 [Thanksgiving holiday]
Fri Nov 26 [Thanksgiving holiday]
Mon Nov 29 -- Snooping caches
Wed Dec 01 -- Banyan trees, cached and crossbar based
Fri Dec 03 -- Branch prediction (more associative memory)
Mon Dec 06 -- Memory management units (more associative memory)
Wed Dec 08 -- Message passing machines (mostly various hypercubes)
Fri Dec 10 -- Review
Final Exam
Week of Dec 13 ??:00