Final Study Questions

22C:122, Fall 1999

Douglas W. Jones
    A Subject: Consider a computer with the following characteristics:
         Word size:          32 bits
         General Registers:  64 (includes PC)
         Instructions:
            _______________________________________________________________
           |___|___________|___________|___________|___________|___________|
            OP      R1          R2           op         sh          R3
    
            OP = 00 operate
    		  R1 = shf(R2 op R3)
                            ___________
    		  op = |_____|_____|
                             alu   sr2
    
    			alu = 3 bit alu function select
    			sr2 = 3 bit shift select for R2 operand
    
    		  sh = 6 bit signed shift count for result
    		   
            _______________________________________________________________
           |___|___________|___________|___________________________________|
            OP      R1          R2                   const
    
            OP = 01 immediate constant to register
    		   R1 = R2 + sign-extend(const)
    
            OP = 10 load      memory to register
    		   R1 = M[R2 + sign-extend(const)]
    
            OP = 11 store     register to memory
    		   R1 = M[R2 - sign-extend(const)]
    

    A Question: How would you pipeline this machine?

    A Question: How would you handle function calls on this machine?

    A Question: Where would you put what kinds of caches on this machine?

    A Question: What's missing from this architecture?