Homework 4

22C:122, Fall 1999

Due Wednesday Sept 22, 1999, in class

1. Given that you may use some combination of and, or and not gates, plus exactly one tristate bus driver with the specification given by the truth table in the notes for lecture 9, give a schematic diagram for a circuit that emulates a non-inverting open-collector bus driver.

2. Background The original DEC PDP-8 I/O bus had the following structure (simplified):
   • Data out: one word, from CPU.
   • Data in: one word, to CPU
   • Address: 6 bits, from CPU
   • IOP 1: 1 bit, from CPU
   • IOP 2: 1 bit, from CPU
   • IOP 4: 1 bit, from CPU
   • Clear AC: 1 bit, to CPU
   • Skip: 1 bit, to CPU
   The PDP-8 IOP instruction was as follows:

            __ __ __ __ __ __ __ __ __ __ __ __
           |1 |1 |0 |  |  |  |  |  |  |  |  |  |
           |__|__|__|__|__|__|__|__|__|__|__|__|
           | opcode |     address     |function|
   

   The address field of the instruction register is always present on the I/O bus. The contents of the accumulator is always present on the data out lines of the I/O bus. If, at any time, a 1 is written on any of the data in lines, the corresponding bit of the accumulator will be set.

   If, at any time, a 1 is written on the Clear AC line, the accumulator is cleared. If, at any time, a pulse is sent on the Skip line, the program counter is incremented, causing the next instruction in sequence to be skipped.

   The function field of the IOT instruction (opcode 110) is encoded on the IOP 1, IOP 2 and IOP 4 lines as follows:

   	     |        __
   	IOP1 |_______|  |________________  (function = xx1)
   	     |              __
   	IOP2 |_____________|  |__________  (function = x1x)
   	     |                    __
   	IOP4 |___________________|  |____  (function = 1xx)
   	     |
   <\PRE>
   The pulses on the IOP lines are only present if the opcode is 110 and
   the corresponding bit of the IOP field is set.
   
   Given this, consider the standard keyboard input interface for the
   PDP-8.  This had the following IOT instructions:
   
   110 000 011 xx1 - skip next instruction if keyboard flag set
   110 000 011 x1x - clear AC and clear keyboard flag
   110 000 011 1xx - or keyboard data with accumulator
   
   Note that these instructions can be combined, so function 110, for
   example first clears AC and the keyboard flag and then ors the data
   from the keyboard with the accumulator.  The keyboard interface
   contained one 7-bit data register that holds, at any time, the ASCII
   code for the character most recently typed on the keyboard, plus a
   one bit flag that is set whenever any key is pressed.
   
   Part A:
   Identify, for each bus line, whether it is single source or multiple
   source.  For multiple-source lines, identify the state the bus terminator
   must hold the line at when it is not driven, and work out the truth-table
   that the bus driver must conform to in order to implement this specification.
   
   Part B:
   Give a logic diagram for the complete interface between the keyboard and
   the bus.  Include the logic needed for address decoding, skip logic, clear
   logic and data transfers.
   
   
   The Problem:
   In the notes for lecture 10, a long list of ALU operations is given.
   Which of these are useful on write to the ALU, and which are useful on
   read from the ALU.