Sukumar Ghosh, 201P Maclean Hall, 319-335-0738, sukumar-ghosh@uiowa.edu
Class meeting time: 11:00AM - 12:15PM TTh W268 CB
Semester hours: 3
Office hours: 2:00-3:30 PM TTh
Chao, Yang, chao-yang@uiowa.edu
Office: 101N Maclean Hall, 319-335-2839
Office hours: Tuesdays and Wednesdays 3:30-5:00 PM
Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Naraig Manjikian:
Computer Organization and Embedded Systems (6th edition)
McGraw Hill, 2012. (for eBook, check this link )
This course will adopt a top-down approach towards understanding computer organization. We will begin with how high-level language programs are translated into assembly language programs, and how the translated version is interpreted by a basic digital computer. Subsequently, we will discuss how to design the basic building blocks of a digital computer from simpler hardware components.
The software component of the course will introduce assembly language programming of the ARM processor. It will describe instructions for control-flow, load and store, arithmetic and logical operations, stack handling, various addressing modes and their utility. The hardware components will include logic gates, combinatorial circuits, sequential circuits, ALU design, control unit, memory unit, peripheral interfacing, pipelining, RISC vs. CISC, performance issues.
There will be 6 homeworks, two quizzes and two examinations. The homeworks will account for 24% of the final grade. The quizzes will account for 10% of the final grade, and the tests will be worth 66% of the final grade. The tests will be scheduled as follows:
Midterm Exam: Tuesday, October 2, 2012 (in class)
Quiz 1: September 20, 2012 (in class)
Quiz 2: November 15, 2012 (in class)
Final Exam: Friday 12/14/2012 (7:30AM-9:30AM) in Room W268 CB
Letter grades will be assigned roughly as follows:
A+ = 95-100 B+ = 80-84 C+ = 65-69 D+ = 50-54 F = 0-39 A = 90-94 B = 75-79 C = 60-64 D = 45-49 A- = 85-89 B- = 70-74 C- = 55-59 D- = 40-44
The instructor reserves the right to make minor modifications in the grading scale.
Homework 1 Assigned Sep 4, due Sep 13
Homework 2 Assigned Sep 18, due Sep 27
Homework 3 Assigned Oct 9, due Oct 18
Homework 4 Assigned Oct 23, due Oct 30
Homework 5 Assigned Nov 6, due Nov 15
Homework 6 Assigned Nov 27, due Dec 04
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Week1 (August 20-24, 2012) Introduction to Computer Organization Instruction Set Architecture |
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Week 2-3 (August 27-September 7, 2012) Instruction Set Architecture (Continued) ARM Assembly Language |
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Week 4 (September 10-September 14, 2012) Input-Output Programmed I/O and Interrupt-driven I/O |
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Week 5-6 (September 17-September 28, 2012) Understanding Logic Design Logic Design: Gates, Adders, Functional units etc. More on Logic Design (from your textbook) |
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Week 8 (October 8-October 12, 2012) Sequential circuits, registers, counters Logic Design continued |
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Week 9 (October 15-October 19, 2012) Basic Processor Design Chapter 5 of the textbook |
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Week 10 (October 22-October 26, 2012) Processor Design continued -- pipelining Chapters 5 and 6 of the textbook |
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Week 11 (October 29-November 2, 2012) Pipelining Chapters 5 and 6 of the textbook |
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Week 12 (November 5-November 9, 2012) Memory unit Chapter 8 of the textbook |
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Week 13 (November 12-November 16, 2012) Memory unit continued -- cache memory Chapter 8 of the textbook |
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Week 14 (November 26-November 30, 2012) Virtual memory Chapter 8 of the textbook |
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Week 15 (December 3-December 7, 2012) Multocore processors and review |