Sukumar Ghosh, 201P Maclean Hall, 319-335-0738, ghosh@cs.uiowa.edu
Class meeting time: 11:00 AM-12:40 PM MWF, 205 MLH
Semester hours: 4
Office hours: 9:30-10:30 AM, MWF

Linda Null and Julia Lobur, "Computer Organization & Architecture" Second edition Jones and Burtlett (2006)

We will cover the first seven chapters of the book. The remaining chapters will be a good reference material.. We will look at how high-level language programs are translated into assembly language programs, and how the translated version is interpreted by a basic digital computer. We will discuss how to design the basic building blocks of a digital computer from simpler hardware components. Topics will include: assembly language, basic building blocks of a processor, logic gates, combinatorial circuits, sequential circuits, ALU design, understanding the datapath of a processor, control unit, main memory, cache memory and virtual memory, peripheral interfacing, buses, pipelining, RISC vs. CISC, performance issues.

There will be 4 home assignments, and two examinations. The assignments will account for 50% of the final grade, and the tests will be worth 50% of the final grade. The tests will be scheduled as follows:

Examination 1 (25%): June 28 2006, in class
Examination 2 (25%): July 28 2006, in class

Letter grades will be assigned roughly as follows:

A+ = 95-100	B+ = 80-84	C+ = 65-69	D+ = 50-54	F = 0-39
A  = 90-94 	B  = 75-79 	C  = 60-64 	D  = 45-49
A- = 85-89	B- = 70-74 	C- = 55-59 	D- = 40-44

The instructor reserves the right to make minor modifiications in the grading scale.

Introduction to Computer Organization
Data Representation
Boolean Algebra and Digital Logic
Marie Architecture
A datapath for MARIE
Instruction Set Architecture
Memory Unit
Virtual memory implementation
Disk storage
Data Compression

Assignment 1
Solution to Assignment 1
Assignment 2
Solution to Assignment 2
Assignment 3
Solution to Assignment 3
Assignment 4
Solution to Assignment 4